发明名称
摘要 In a phase locked oscillator (PLO), the frequency of a voltage controlled oscillator (VCO) is changed in response to error signals indicating the phase error between the individual pulses of a stream of input pulses and the output pulses of the PLO. The running of the PLO is temporarily interrupted whenever the phase error exceeds a predetermined amount, and is restarted in phase with the next input pulse from the stream of pulses. A residual part of the error signal causing the interruption is accumulated so that after each interruption the frequency of the oscillator is closer to the frequency of the input stream of pulses. The process is repeated as required until phase lock is achieved.
申请公布号 JPS541141(B2) 申请公布日期 1979.01.20
申请号 JP19740147720 申请日期 1974.12.24
申请人 发明人
分类号 H03L7/18;H03L7/08;H03L7/089;H03L7/191 主分类号 H03L7/18
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