Clock controlled pulse counter with selectable division ratio - has logic circuit connected to second counter and setting first counter

摘要

The device has a first counter controlled by pulse edges of a specified polarity, and a decoder connected to its output delivers a control pulse when the counter had reached a specified number. As in 2644770, a second counter is provided which is resettable by the decoder. It counts clock periods up to a specified number, and then changes a logic state at its output. A blocking pulse generator, controlled by the second counter, is connected to the decoder output. The first counter is blocked by the pulses of the blocking pulse generator. Charge pulse pick-up setting the first counter is a logic connected to the second counter.