Communications bus monitor

摘要

A monitor provides a continuously active assessment of the performance of a parallel communications bus by continuously comparing the binary level of the bus lines with system-defined levels which should be exhibited when the bus is in an "at rest" condition. Logic circuitry enables bus line logic level comparisons with "at-rest" condition reference values with any one discrepancy providing a latched invalid bus annunciation which is selectively enabled during periods when the bus is sensed to be in the "at-rest" condition.