发明名称 Telephone switching circuit data delay equalisation - has incoming shift register and store clocked from transmit terminal over separate transmission lines
摘要 <p>The transmission of data between two points in a telecommunications network uses digital switches. It is particularly applicable to PABX interconnection with the main network and is designed to overcome errors introduced by various transmission delays. Two transmission localities (UL) are provided between the two switching units (M1,M2). Transmission of data between the two points (M1,M2) is in serial form. In the second unit (M2) an equalising circuit (AGL) receives the clock pulse from the first (M1) on a dedicated facility (ST). Channel clock information from the first unit (M1) is also sent over a second facility (KT). These two clocking rates are used in the control of the receive modules (M2) incoming shft register (ESR) and subsequent intermediate store (E25).</p>
申请公布号 BE894835(A4) 申请公布日期 1983.04.28
申请号 BE19822059884 申请日期 1982.10.28
申请人 INTERNATIONAL STANDARD ELECTRIC CORP. 发明人 J. ENDLER;A. SCHILL
分类号 H04Q3/62;(IPC1-7):04L/ 主分类号 H04Q3/62
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