发明名称 Memory protection circuit for an electronic postage meter
摘要 An electronic postage meter includes a memory protection circuit. The memory protection circuit prevents the inadvertent writing of spurious data into memory locations in the nonvolatile memory during a power down cycle. The memory protection circuit works in conjection with a WRITE voltage terminal associated with the nonvolatile memory. Means couple a first voltage source providing a predetermined polarity voltage to the WRITE voltage terminal when a predetermined power condition exists such that the nonvolatile memory is enabled to have data written into memory locations. When the predetermined power condition does not exist, the means utilize a second different voltage source to change the voltage level at the WRITE voltage terminal to insure that data is not written into the memory locations.
申请公布号 US4445198(A) 申请公布日期 1984.04.24
申请号 US19810306979 申请日期 1981.09.29
申请人 PITNEY BOWES INC. 发明人 ECKERT, ALTON B.
分类号 G06F12/16;G07B17/00;G07B17/02;G11C7/24;G11C16/22;G11C16/30;(IPC1-7):G06F1/00 主分类号 G06F12/16
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