Semiconductor memory device with transfer means between bit lines and data buses.

摘要

A semiconductor memory device having matrix-arranged memory cells (MC) carrying out data write or read operations to or from a selected memory cell through a pair of data buses (DB, DB) by the selection of a word line (WL) and a pair of bit lines, (BL, BL) the device including two transfer devices (Q1, Q2 and Q6, Q7, Q8, Q9) which transfer data between bit lines and data buses, one operated in writing and the other operated in reading. Even if the data read operation is stopped midway by a system like, the memorized data in the memory cell is not destroyed.