| 摘要 |
There is provided a detector circuit for detecting a change or difference in the frequency or phase of a signal (A) and for sending out the result thus detected as a pulse width modulation signal having a pulse width corresponding to the change in the frequency or phase of the measured signal and having a modulation degree which is changed according to the change in the frequency of the measured signal. In accordance with the present invention, a first circuit means (10 to 19) counts pulses in a first clock pulse train (CPX) during the duration of the measured signal, said first clock pulse train being produced on the basis of a reference clock pulse train (CP). The first circuit means also generates data (D1) corresponding to the frequency or phase of the measured signal and latches the data at an edge of a sampling pulse (SP1) produced on the basis of the measured signal. A second circuit means (21, 31) generates a signal (PO) having a pulse interval (Tx) which corresponds to the latched data (D2). A pulse generating circuit (22) transforms a second clock pulse train (PXO) produced on the basis of the reference clock pulse train into a carrier signal (PC) having a predetermined frequency and a predetermined duty cycle in accordance with a designated mode. In addition, a pulse width modulation circuit (32) produces a pulse width modulation signal (PW) having a predetermined modulation degree corresponding to the designated made in synchronism with the carrier signal and with the output signal from the second circuit means. |
