发明名称 Process for and structure of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting lines
摘要 A process for producing VLSI (very large scale integrated) circuits employs techniques of self-aligned gates and contacts for FET devices. The use of materials in successive layers having different etch characteristics permits selective oxidation of desired portions only of the structure without need for masking and removal of selected material from desired locations by batch removal processes again without use of masking. There results VLSI circuits having increased density and reliability.
申请公布号 US4477962(A) 申请公布日期 1984.10.23
申请号 US19820397050 申请日期 1982.07.12
申请人 ROCKWELL INTERNATIONAL CORPORATION 发明人 GODEJAHN, JR., GORDON C.
分类号 H01L21/28;H01L21/285;H01L21/336;H01L21/60;H01L27/112;(IPC1-7):H01L21/22;H01L21/44 主分类号 H01L21/28
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