Clock with two phases, with no overlap, which can be produced as an MOS integrated circuit of period adjustable to the operation of the circuit to be controlled

摘要

The invention relates to a clock with two phases, with no overlap, which can be produced as an MOS integrated circuit of period adjustable to the operation of the circuit to be controlled. The clock with two phases phi 1 and phi 2, with no overlap, consists of two coupled oscillators each including a gate P1 or P2, of NOR type with two inputs, the output of which is connected to two delay lines LR1 and LR2 or LR3 and LR4 connected in cascade. The delayed signal provided by the second delay line LR2 or LR4 is reinjected onto the first input B or D of the NOR gate. The second input C or A of the NOR gate constitutes the control or coupling input to the other oscillator. It is connected to the output of the first delay line LR3 or LR1 of the other oscillator. The assembly can be integrated on the same wafer as the circuit to be controlled. The delay lines consist of an even number of invertors. The invention applies to clocks with two phases, with no overlap, for controlling integrated circuits operating dynamically. <IMAGE>