发明名称 |
Circuit arrangement for reconstructing noise-affected signals |
摘要 |
An analog input signal is applied to a timing circuit (2) for generating a sampling pulse in response to an impulse noise introduced to the signal and also to a first sample-and-hold circuit (7, 8, 9) through a buffer amplifier (6). The first sample-and-hold circuit includes a capacitor (7) and a switch (8) for applying the analog signal to the capacitor to develop a voltage therein which keeps track of the waveform of the analog signal in the absence of the sampling pulse and holding the voltage in response to the sampling pulse. A differentiator (11) is coupled in a feedback loop from the output of the first sample-and-hold circuit for generating a signal representative of the slope ratio of the analog signal. A second sample-and-hold circuit (15) is provided in the feedback loop for sampling and holding the slope ratio signal in response to the sampling pulse. Further included in the feedback loop is a bidirectional constant current source (20) which provides constant current charging and discharging of the capacitor (7) in response to an output signal from the second sample-and-hold circuit (15).
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申请公布号 |
US4517518(A) |
申请公布日期 |
1985.05.14 |
申请号 |
US19830517985 |
申请日期 |
1983.07.29 |
申请人 |
VICTOR COMPANY OF JAPAN, LTD. |
发明人 |
ISHIGAKI, YUKINOBU |
分类号 |
F02B75/02;H03G3/34;(IPC1-7):H03B1/04 |
主分类号 |
F02B75/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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