A convolution arithmetic circuit.

摘要

A convolution arithmetic circuit according to this invention is equipped with: accumulator means that multiplies two digi-- tal data sequences and then adds up respective results thus multiplied; a first memory that stores the coefficient data sequence, and a second memory that stores the multiplicand data sequence, that are supplied to the accumulator means; a first count means connected to the first memory; a second count means connected to the first memory; means for generating a control signal that temporarily alters the output from the second count means; means for generating a signal that specifies the operating mode of the second memory; and means for introducing, to the second memory and the accumulator means, the multiplicand data constituted by input signals supplied from an external device when this second memory is in a write-mode; whereby the first count means performs an address operation for the sequential reading of the coefficient data stored in the first memory; and the second count means performs an address operation for the second memory to read the stored multiplicand data from or to write the input signal in the second memory; so that the convolution operation can be performed on the digital signals in real-time. 1