发明名称 WAFER LEVEL PACKAGE RESISTANCE MONITOR SCHEME
摘要 An integrated circuit includes a monitoring circuit and a monitored circuit connected with the monitoring circuit. The monitoring circuit is operable to determine during fabrication if a resistance of a connection between an in-fab redistribution layer connector and a post-fab redistribution layer connector exceeds a threshold.
申请公布号 HK1187149(A1) 申请公布日期 2016.12.30
申请号 HK20130114396 申请日期 2013.12.30
申请人 BROADCOM CORPORATION 发明人 Hu, Kunzhong;Zhong, Chonghua;Law, Edward
分类号 H01L 主分类号 H01L
代理机构 代理人
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