| 摘要 |
An arrangement for generating an analog angle-modulated carrier signal of a substantially constant amplitude in response to data signals having a symbol rate 1/T comprises a read-only memory for storing modulation parameters, an addressing circuit responsive to a predetermined number of consecutive data symbols for producing read addresses with a rate q/T, where q is an integer greater than 1, and a signal processor for processing read values to form the analog angle-modulated signal. An arrangement having a predominantly digital structure which does not utilize a DAC circuit as an interface between digital and analog sections of the signal processor is obtained in that the signal processor incorporates a zero-crossing generator comprising a delay circuit responsive to a numerical time-setting signal a set pulse having a presettable time delay of at most T/q, a gate circuit only responsive to a zero-crossing indication signal for transferring the set pulse to a bistable pulse generator, which produces a two-level signal whose level transitions only occur at the instants of the transferred setting pulses, and a bandpass filter having a centre frequency equal to the carrier frequency. These measures result in an arrangement which is capable of processing a wide range of data symbol rates 1/T and which is particularly suitable for monolithic integration.
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