发明名称 |
CMOS integrated circuit |
摘要 |
A CMOS integrated circuit includes a P-channel type MOS transistor which is formed on an N-type silicon substrate, an N-channel type MOS transistor which is formed on a P well formed in the substrate, and parasitic bipolar transistors which are electrically connected to each other to form a kind of thyristor structure. A power supply voltage is applied to a source electrode of the P-channel type MOS transistor through a part of the substrate which presents a resistance. The resistance is electrically connected to the parasitic bipolar transistor of the thyristor structure to thereby prevent the occurrence of a latch-up phenomenon in which a large current continuously flows through the parasitic bipolar transistors and may destroy the CMOS integrated circuit. Because of the prevention of the latch-up phenomenon, the CMOS integrated circuit is always maintained in good condition.
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申请公布号 |
US4672584(A) |
申请公布日期 |
1987.06.09 |
申请号 |
US19850691701 |
申请日期 |
1985.01.15 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
TSUJI, KAZUHIKO;YAMAGUCHI, SEIJI;ICHINOHE, EISUKE |
分类号 |
H01L21/74;H01L21/822;H01L27/04;H01L27/08;H01L27/092;H01L29/78;(IPC1-7):H01L27/02 |
主分类号 |
H01L21/74 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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