| 摘要 |
A mode detection circuit is disclosed that provides a high or low digital output signal to an associated circuit analog dependent upon the corresponding input signal. The input signal to the mode detection circuit will determine whether the mode of the input signal and associated circuit is to be external or internal. In this embodiment, the input of the mode detection circuit receives either a first voltage in the internal or a second voltage in the external mode which is lower than the first voltage. Thus, when the input voltage to the circuit is the first voltage, there is provided at the output a digital output that is high. In this embodiment, a high digital output signal would mean that the associated circuit with the detection circuit would be in the internal mode. On the other hand, when the analog input signal is the second voltage, there would be provided at the output of the detection circuit a low digital output signal which would mean that the associated circuit would be in the external mode. Accordingly, this circuit utilizes digital detect logic to which network (i.e. external or internal) of the associated circuit is to be utilized depending upon the voltage level which is provided at the input of the mode detection circuit.
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