Video display terminal with multi frequency dot clock

摘要

A video display terminal for selectively displaying a format of 80 characters per line and a format of 132 characters per line includes a microprocessor driven controller, a VCO for supplying the dot clock frequency, a frequency divider connected between the VCO and the controller and a crystal controlled phase detector coupled between the horizontal deflection signal output of the controller and the input of the VCO for smoothly changing the dot clock frequency in response to software induced changes in the controller.