发明名称 Viterbi decoder comprising a majority circuit in producing a decoded signal
摘要 In a Viterbi decoder for use in producing a decoded signal by correcting and decoding convolutional codes, a majority circuit (46) is connected to a path memory (45). At each of the time slots used for the respective convolutional codes, the majority circuit makes a decision and selects a decoded datum of the decoded signal in response to a majority of information bits which are memorized in the path memory. The Viterbi decoder consists of a read-only memory, which simplifies the circuit, reduces the required number of circuit elements, and makes a lower cost circuit.
申请公布号 US4715037(A) 申请公布日期 1987.12.22
申请号 US19850705073 申请日期 1985.02.25
申请人 NEC CORPORATION 发明人 YAGI, TOSHIHARU
分类号 H03M13/00;H03M13/23;H03M13/41;(IPC1-7):G06F11/10 主分类号 H03M13/00
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