Quad processor

摘要

The present invention includes plural plasma etching vessels and a wafer queuing station arrayed with a wafer transfer arm in a controlled environment. Wafer processing in each vessel is regulated by a state controller for processing a plurality of wafers from a single cassette, contained within the vacuum environment of the plural plasma etching vessels and wafer queuing station, to provide an orderly and efficient throughput of wafers for diverse or similar processing in the plural vessels. In this manner a wafer can be processed as soon as a vessel becomes available.