| 摘要 |
An LSI device chip has an internal cell area (ICA), arranged inwardly of the chip and comprising a plurality of internal cells (2), and an external cell area (IOC2) arranged outwardly of the internal cell area (ICA) and comprising a plurality of external cells, with a bonding pad area (PD), arranged outwardly of the internal cell area, in which is disposed a reference voltage supply pad (PGND), and comprises an inner reference voltage line, (GND1, GND2) arranged inwardly of the bonding pad area (PD), connected to said reference voltage supply pad (PGND) and to internal cells (2), and an outer reference voltage line (GND3), arranged outwardly of the bonding pad area (PD), connected to said reference voltage supply pad (PGND) and to external cells. |
