| 摘要 |
PURPOSE:To contrive the improvement of the capability of error detection and correction by decreasing the number of symbols in a digital signal in one block. CONSTITUTION:A signal read from a 1st memory 2 is read sequentially in the lateral direction of a memory map (data and 1st and 2nd parities are read in the order capable of error correction by the 1st parity at first), and in this case, the signal is read in the unit of one block signal having a signal format being the addition of at least a synchronizing signal to a digital signal comprising plural symbol number of data and parity with a symbol smaller than m- symbol, and the result is fed to a modulation circuit 4. Thus, the data number (including parity) in the block is decreased. Thus, even if a part of the digital signal to be written in the 2nd memory 9 is missing at the reception side, the effect is relieved.
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