CIRCUIT FOR CORRECTING ERROR IN SYNCHRONIZING SIGNAL

摘要

The circuit reduces the interval of synchronous pulse generated when finding the synchronous pattern in digital audio system so that the glitch generated by the jitter phenomenon is not determined as a synchronous signal. The circuit comprises a data signal detector (10), an output circuit (20) for synchronous signal, and a synchronous pulse applying circuit (30). A flipflop circuit (FF2) receives a reversed data clock and clock signal counted for glitch generating time. The outputs of the FF2 and the circuit (10) are provided to the output circuit (20) as clock signal through AND gate (A2).