发明名称 DIVISION ARITHMETIC UNIT
摘要 PURPOSE:To attain accurate division processing even when the level of an input value is lower with respect to the full scale of the arithmetic processing capability of the CPU by setting in advance a count of a counter to a preset number of digits and applying division. CONSTITUTION:Voltage/frequency converters 1, 5 output frequency pulses corresponding to inputs, voltage V and current I and are counted by counters 2, 6 whose operating time is controlled by a timer 3. If either of the counter does not reach a present number of digits, the CPU 4 stores the count to a buffer memory, operates the counters 2, 6 again and increments the outputs to the buffer memory. When both the voltage V and the current I reach the preset number of digits, the CPU 4 uses a formula of Z=V/I to process the impedance. Since the count of the digital signal of the numerator and denominator is brought into the preset digit number for the object of the division processing in this way, the arithmetic error is decreased.
申请公布号 JPS63273130(A) 申请公布日期 1988.11.10
申请号 JP19870107478 申请日期 1987.04.30
申请人 HIOKI DENKI KK 发明人 KIMURA HARUHIKO
分类号 G01R27/02;G01R27/08;G06F7/60;G06F7/62;G06F17/10 主分类号 G01R27/02
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