发明名称 FET FREQUENCY MULTIPLIER
摘要 PURPOSE:To obtain an FET frequency multiplier of a wide band by constituting the FET element of plural steps to be provided between a fundamental wave matching circuit in which a fundamental wave signal is inputted and a multiplying wave matching circuit to output a multiplying wave signal, of an FET group in which respective step intervals are direct-current-cut by a capacitor and concatenated with the shortest distance. CONSTITUTION:A fundamental wave signal input is inputted in a fundamental wave matching circuit 2 constituted of a microstrip line 21 made of an alumina substrate, etc., to a fundamental wave, an impedance matching is taken and sent to an FET group 1, to the higher harmonic wave of a desired degree out of high harmonic waves generated in this place, the impedance matching is executed and the fundamental wave signal is selected by a multiplying wave matching circuit 3 of a microstrip 31 and outputted as multiplying wave signal. In this constitution, the FET group 1 is constituted of the cascade connecting of FET elements 11-1n, a source S of respective elements is earthed, a drain D is connected through a capacitor C1 of a direct-current-cutting to an element 12 of next step, a stain bias +VD is given to each drain S and a gate bias -VG is given to a gate G of a first step element 11.
申请公布号 JPS63281504(A) 申请公布日期 1988.11.18
申请号 JP19870117712 申请日期 1987.05.14
申请人 FUJITSU LTD 发明人 IWATSUKI MASANORI
分类号 H03B19/14 主分类号 H03B19/14
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