| 摘要 |
PURPOSE:To relax the production of noise caused due to charge/discharge of a PLA by providing a high speed small capacity decoder and a low speed decoder. CONSTITUTION:An instruction decode section consists of an instruction buffer register IBR 121, a sequencer PLA 103 for instruction processing control, a high speed instruction decoder PLA 101 of small capacity operated by one clock cycle, a low speed instruction decoder PLA 102 operated by two clock cycle, and a selector SEL 126 selecting outputs of the PLA 101, 102. When the instruction is decodable by the PLA 101, a PLAHIT 119 signal is outputted and the SEL 126 selects an output signal MTOP 113 from the PLA 101. When the instruction cannot be decoded by the PLA 101, a start signal PLAON 112 is generated and the instruction is decoded by the PLA 102, an output signal MTOP 114 from the PLA 102 is selected by the SEL 126 and outputted. Thus, the noise attended with the PLA drive is relaxed.
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