发明名称 CACHE MEMORY CONTROLLING SYSTEM
摘要 PURPOSE:To sharply improve the performance of a data processing system, by setting write data in a write data buffer in a cache memory device even when a cache error occurs. CONSTITUTION:When a cache error occurs in the course of storing access, the content of a write data buffer register 21 is written in a cache memory 20 after a move-in registering operation is made or the combined result of write data and move-in data in the unit of byte in accordance with the content of a byte mark is written in the cache memory 20 while the registering operation is carried on. Therefore, even if a cache error occurs, an instruction processor 1 can make so called throwing-off control which causes storing access to be completed by setting the write data in the write data buffer register 21 in a cache memory device. Thus the performance of this system can be improved sharply.
申请公布号 JPS63311548(A) 申请公布日期 1988.12.20
申请号 JP19870148218 申请日期 1987.06.15
申请人 FUJITSU LTD 发明人 OKADA MASAYUKI;MORI TSUYOSHI
分类号 G06F12/08 主分类号 G06F12/08
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