发明名称 Input offset voltage trimming network and method
摘要 Trimming of input offset voltage of a diferential amplifier is provided by a pair of resistance networks which are connected to the emitters of a pair of current mirror transistors. By adjusting the resistances of the resistance networks, the adjustment currents flowing through the current mirror transistors are selected to cancel out the input offset voltage of the differential amplifier. Each resistance network includes a plurality of resistors connected in series with a low resistance shorting link connected in parallel with each of the plurality of resistances. The input offset voltage is trimmed by selectively cutting the shorting links with a two-phase measure and trim process.
申请公布号 US4827222(A) 申请公布日期 1989.05.02
申请号 US19870131804 申请日期 1987.12.11
申请人 VTC INCORPORATED 发明人 HESTER, RICHARD E.;NGO, TUAN V.
分类号 H01C17/23;H03F3/45 主分类号 H01C17/23
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