CMOS INPUT PROTECTION CIRCUIT

摘要

The circuit is for preventing the latch-up and increasing the break- down voltage of the gate insulation layer caused by the electrostatic discharge when the surge voltage (VDD) is less than the threshold voltage (VFTN) of a N-type field transistor (FTN), the polysilicon resistors (R1, R2) limits the current and a clamping diode (D1) passes the current to a power supply terminal (32). When the surge voltage is greater than the (VFTN), the current (VIN-VDD) is bypassed to the substrate so that the protection from the surge voltage is performed.