| 摘要 |
An asynchronous interrupt arbitrator buffers the occurrences of multiple interrupts so as to permit an asynchronous host to reliably determine which interrupt request lines have been activated. The technique responds to activities on any interrupt request line, but multiple requests on the same line between host responses may not be enumerated. An arbitration circuit and a buffering scheme eliminate the possibility of missed interrupt requests or erroneous multiple triggering of a single request event. In a particular embodiment, a source of interrupts is synchronized to a clock ICLK. The host processing element asynchronously responds to interrupt requests by sensing an interrupt request signal and then reading a status register 44, 46, 48 to identify the source of the interrupt request. <IMAGE> |
