发明名称 Tristable output buffer with state transition control.
摘要 <p>Voltage on a circuit ground terminal (24) in an output buffer is controlled by limiting induced voltage on a circuit ground pad as the output makes a transition from a high voltage level to a low voltage level thereby minimizing deleterious effects on other circuits connected to the common circuit ground terminal (24). A ground bounce circuit (34) controls the bias on a transistor (14) connecting the output to the circuit ground terminal (24) with power saver circuitry (50) limiting actuation of the ground bounce circuitry (34) except during the high to low transitional phase. &lt;IMAGE&gt;</p>
申请公布号 EP0466323(A1) 申请公布日期 1992.01.15
申请号 EP19910305085 申请日期 1991.06.05
申请人 ZORAN CORPORATION 发明人 PATIL, TARANG PANDURANG
分类号 H03K19/003;H03K17/687;H03K19/0175 主分类号 H03K19/003
代理机构 代理人
主权项
地址