发明名称 Digital architecture for an artificial neural network.
摘要 <p>An artificial neural network is provided using a digital architecture having feedforward (40) and feedback processors (52) interconnected with a digital computation ring (30) or data bus to handle complex neural feedback arrangements. The feedforward processor receives a sequence of digital input signals and multiplies each by a weight in a predetermined manner and stores the results in an accumulator. The accumulated values may be shifted around the computation ring and read from a tap point thereof, or reprocessed through the feedback processor with predetermined scaling factors and combined with the feedforward outcomes for providing various types neural network feedback computations. Alternately, the feedforward outcomes may be placed sequentially on a data bus for feedback processing through the network. The digital architecture includes a predetermined number of data input terminals (12) for the digital input signal irrespective of the number of synapses per neuron and the number of neurons per neural network, and allows the synapses to share a common multiplier and thereby reduce the physical area of the neural network. A learning circuit (80) may be utilized in the feedforward processor for real-time updating the weights thereof to reflect changes in the environment. &lt;IMAGE&gt;</p>
申请公布号 EP0482376(A2) 申请公布日期 1992.04.29
申请号 EP19910116405 申请日期 1991.09.26
申请人 MOTOROLA, INC. 发明人 GARDNER, ROBERT M.
分类号 G06F15/18;G06G7/60;G06N3/04;G06N3/063;G06N99/00 主分类号 G06F15/18
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