Article comprising a lattice-mismatched semiconductor heterostructure.

摘要

Disclosed are strained layer heteroepitaxial structures (e.g., GeSi/Si) that can have low threading dislocation density as well as a substantially planar surface. Furthermore, a large fraction (e.g.,>90%) of the total surface area of the structure can be available for device processing. These advantageous features are achieved through utilization of novel "dislocation sinks" (11) on or in the substrate whose height parameter h is less than or about equal to the thickness of the strained heteroepitaxial layer on the substrate. Exemplarily, h >/= hc, where hc is the critical thickness associated with misfit dislocation generation in the substrate/overlayer combination. <IMAGE>