发明名称 STACKED DRAM CELL AND METHOD OF MANUFACTURING THE SAME
摘要 The method for increasing the size of a storage node comprises the steps of defining an active area on a P type silicon substrate (1), implanting B ions into the substrate (1) excluding the active area to form a P-plus doping layer (5) to form a field oxide film (4) thereon, forming first and second gate electrodes at the active area, implanting and heat-treating impurities into the active area excluding the electrodes region to form an n-plus doping layer (1a) as a source and drain region, forming a bit line (10) between the first and second gate electrodes, forming a first storage node (14) thereon, and forming a capacitor plate (17) thereon to form a second storage node (20) thereon.
申请公布号 KR920010847(B1) 申请公布日期 1992.12.19
申请号 KR19890012337 申请日期 1989.08.29
申请人 KOREA ELECTRONICS & TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 KIM, CHON - SU;LEE, JIN - HO;LEE, KYU - HONG;KIM, DAE - YONG
分类号 H01L27/108;(IPC1-7):H01L27/108 主分类号 H01L27/108
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