| 摘要 |
A variable frequency dividing circuit according to this invention switches a frequency division ratio immediately after a neew frequency division ratio has been input, and then performs a frequency dividing operation without discarding already counted values. This frequency dividing circuit generates an error signal if a newly input frequency division ratio differs from the previous frequency division ratio and the already counted value is larger than the new frequency division ratio. Furthermore, the frequency dividing circuit performs forcibly a frequency division completion processing according to the consecutively input frequency signal.
|
