发明名称 METHOD FOR FORMING MULTI-LAYERED WIRING
摘要 PURPOSE:To provide a method for forming a high yield reliable multi-layered wiring. CONSTITUTION:Areas 10a and 10b prescribed for the first and second lower wirings, and an area 10c prescribed for separating those lower wirings are formed on the surface of a semiconductor substrate 1, respectively, a conductive layer is formed on the areas 10a, 10b, and 10c, a layer insulating film 4 is formed over the surface of the semiconductor substrate 1 including that of the conductive film, and the layer insulating film 4 is partly removed to form an opening section so that the conductive film can be partly exposed at the bottom of the opening section. Further, an upper wiring 7b is formed on the surface of the semiconductor substrate 1, and the conductive film and a section of the upper-layer wiring 7b on that conductive film are selectively removed at a time to separate the upper wiring 7b from the conductive layer so as to isolate the upper wiring 7b from the conductive film.
申请公布号 JPH0629402(A) 申请公布日期 1994.02.04
申请号 JP19920055954 申请日期 1992.03.16
申请人 TOSHIBA CORP 发明人 SUNADA TAKESHI;MASE KOICHI
分类号 H01L21/3205;H01L21/768;H01L23/522;(IPC1-7):H01L21/90;H01L21/320 主分类号 H01L21/3205
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