| 摘要 |
coating a buffer oxide layer, and polysilicon for a source/drain area on a substrate, and ion-implanting high-concentration impurity into the polysilicon; selectively etching the polysilicon and buffer oxide layer to form the source/drain area; forming sidewalls on the side of the polysilicon of the source/drain area; coating a gate oxide layer, and ion-implanting an impurity for threshold voltage control; sequentially coating polysilicon for gate and a cap oxide layer, selectively removing the polysilicon and cap oxide layer to be left only between the source/drain area; forming a sidewall of oxide layer on the side of the gate area, and forming a storage node; and stacking a dielectric and plate electrode on the storage electrode to form a capacitor, thereby increasing the length of channel and suppressing short-channel effect or hot carrier effect.
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