| 摘要 |
The circuit controls an output mode of monitor by the frequency of input signal irrelevant to an amplitude and polarity of vertical and horizontal synchronous input signals. The circuit includes a polarity conversion unit (10) which has resistors (R11,R12,R13,R14), exclusive OR gates (G11,G12,G13,G14), capacitors (C11,C12), a signal division unit (20) which has resistors (R21,R22,R23,R24), transistors (Q21,Q22), multivibrators (MV21,MV22), capacitors (C21,C22,C23), and an output unit (30) which has resistors, transistors, multivibrators, capacitors.
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