发明名称 MATRIX MEMORY
摘要 PURPOSE: To allow to detect a short-circuit not always in an adjacent lead line and also to allow to test the addressing of a matrix by permitting respective column conductors to be connected to the conductor of a testing bus at the opposite side of the selecting switch of the matrix. CONSTITUTION: The short-circuit exists between row conductors. By the defect, a signal against the combination of an input pits is generated in an output terminal 18 when a row decoder 12 simultaneously drives the row conductors whose number exceeds one. When the row conductor 15, the column conductor 19 or a selecting line 17 is disconnected, when a row coder 12 or a column decoder 14 generates no output signal at all against the combination of at least one bit or when a fault occurs in one of the selecting switches 16, the signal does not appear in the output terminal 18 against the combination of the bit corresponding to inputs 11 and 13. Thus, even the fault in any part added in addressing can be identified by an access signal or an error signal in the output terminal 18.
申请公布号 JPH06187798(A) 申请公布日期 1994.07.08
申请号 JP19930174226 申请日期 1993.07.14
申请人 PHILIPS ELECTRON NV 发明人 PIITAA MAIYAA
分类号 G11C17/00;G11C29/00;G11C29/02;G11C29/12;(IPC1-7):G11C29/00;G11C16/06 主分类号 G11C17/00
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