发明名称 POLYNOMINAL EXPRESSION MULTIPLICATION CIRCUIT OF DIGITAL SYSTEM
摘要 The invention provides the polynomial multiplier to simplify the integrated circuit size and the hardware configuration. The system comprises; search block (10,11) outputting each root (xa,xb) of the polynomial A(x) and B(x); a multiplier that outputs the selective signal from the chien search blocks; a counting converter unit inverting the outputs of the search blocks; a counting processor unit calculating multiplication and addition of the counting converter outputs; a constant output unit (60) that outputs the multiplicant of each of register values (C1'-C1') and polynomial coefficients.
申请公布号 KR940007570(B1) 申请公布日期 1994.08.20
申请号 KR19920006396 申请日期 1992.04.16
申请人 GOLDSTAR ELECTRON CO., LTD. 发明人 PARK, YONG - HO
分类号 G06F7/52;(IPC1-7):G06F7/52 主分类号 G06F7/52
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