发明名称 |
DRAM power management with self-refresh |
摘要 |
A DRAM furnishes power management circuits that remove power from circuits on the DRAM that are not necessary for self-refresh and that turn on and off other circuits necessary for self-refresh in timed relation to the refresh cycle. The power management circuits include a counter and simple decoder circuits that decode the binary output of the counter.
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申请公布号 |
US5365487(A) |
申请公布日期 |
1994.11.15 |
申请号 |
US19920857034 |
申请日期 |
1992.03.24 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
PATEL, VIPUL C.;BROWN, DAVID R.;TSO, JIM C. |
分类号 |
G06F1/32;G06F12/00;G11C5/14;G11C11/401;G11C11/403;G11C11/406;(IPC1-7):G11C7/00 |
主分类号 |
G06F1/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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