| 摘要 |
<p>The synthesizer comprises a phase-locked loop including successively: a variable frequency oscillator 1; a mixer 2 receiving at its first input the signal generated by said oscillator 1 and at its second input a basic reference frequency; a frequency reducing chain; a phase detector 6 receiving the signal delivered by said chain and a predetermined frequency FR1 defining the step size of the output frequency; and a low pass network 8 delivering as output the control voltage for the variable frequency oscillator 1. The frequency reducing chain includes, in cascade between said variable frequency oscillator 1 and said phase detector 6, a plurality of frequency converter stages 20, 20',20", each comprising an heterodyne mixer receiving the signal from the preceding frequency converter stage and a programmable reference frequency, and delivering as output, through a low pass filter network 30, 30', 30", the signal applied to the next frequency converter stage. The determination of the output frequency of said variable frequency oscillator results essentially from a combination of the commands of said programmable reference frequencies.</p> |
