| 摘要 |
An address translation device for translating a virtual address belonging to each one of a plurality of virtual spaces into a real address, comprises: a first circuit for holding a plurality of virtual space identifiers indicating the corresponding virtual spaces; a second circuit for holding first selecting information specifying a virtual space identifier for a virtual space to which a virtual address for an instruction belongs from among the plurality of virtual space identifiers held in the first means, and second selecting information specifying a virtual space identifier for a virtual space to which a virtual address for an operand belongs; a third circuit for selecting any one of the virtual space identifiers specified by the first selecting information and the second selecting information held in the second means, depending on whether the virtual address to be translated is for the instruction or the operand; and a fourth circuit for translating the virtual address into a corresponding real address depending on the selected virtual space identifier.
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