| 摘要 |
A new technique for testing the counting functionality, loading functionality, and operational speed of a binary counter is provided wherein additional logic is incorporated into the counter to enable the counter to be functionally tested with a minimum number of clock cycles. Thus, for an n-bit counter which is partitionable into k subcounters, the counting functionality and operational speed of the counter may be tested in at most 2n/k+2 clock cycles, and the loading functionality of the counter may be tested in at most 2n/k+1 clock cycles.
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