发明名称 Method and apparatus for pre-processing inputs to parallel architecture computers
摘要 A pre-processing method and pre-processor decomposed a first problem belonging to a class of linear algebra problems comprising an input sparse symmetric matrix into a suite of sub-problems. The pro-processor generates a suite of signals representing the information content of a permutation of the rows and columns of fire sparse symmetric matrix. These signals are used to define a block-bordered block-diagonal form leading to a Schur-complement resolution wherein each sub-problem corresponds to a perfect parallelism in the first problem. The preprocessor allocates the sub-problems to sub-processors in a network of parallel architecture computers. The sub-processors solve the sub-problems concurrently and combine the results in a front-end computer, which outputs a solution to the first problem.
申请公布号 US5446908(A) 申请公布日期 1995.08.29
申请号 US19920964594 申请日期 1992.10.21
申请人 THE UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE NAVY 发明人 KEVORKIAN, ARAM K.
分类号 G06F17/12;G06F17/16;(IPC1-7):G06F15/347;G06F15/32 主分类号 G06F17/12
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