发明名称 |
ATM ADAPTATION LAYER RECEIVER FOR FIXED BIT RATE IMAGE SERVICE |
摘要 |
an input/output signal generator driven by a system clock supplied from a network and for receiving a buffer state signal and a managing signal; an SAR header checking means for receiving an input/output control signal from the input/output signal generator and receiving an SAR-PDU transmitted from an asynchronous transfer mode layer to check whether an SAR header is normal; a video information compensating means connected to the SAR header checking means, for receiving the input/output signal from the input/output signal generator to output an acknowledging bit signal and for compensating abnormal SAR-PDU ; a convergence part layer restoring means for receiving an effective SAR-PDU payload from the video information compensating means to output data and a restoring clock, to thereby restore CS-PDU; a clock restoring means for receiving the acknowledging bit from the video information restoring means and a network driving clock from the exterior and for supplying the restoring clock to the convergence part layer restoring means; a video codec connecting means for performing impendence matching and line encoding upon the application of the data and clock to a video codec; and a managing/state signal processor for communicating a managing/state signal in a transmitting part to an external controller. |
申请公布号 |
KR960002682(B1) |
申请公布日期 |
1996.02.24 |
申请号 |
KR19920024193 |
申请日期 |
1992.12.14 |
申请人 |
KOREA ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE |
发明人 |
JUNG, DONG - BUM;OH, JIN - TAE;SIN, YOUNG - SUK;CHOE, MOON - KI |
分类号 |
H04L12/28;(IPC1-7):H04L12/56 |
主分类号 |
H04L12/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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