| 摘要 |
PURPOSE: To enhance the controllability of current by setting the length or the sheet resistance of polysilicon forming a gate electrode. CONSTITUTION: A p-base region 4 is formed selectively on the surface layer on one side of an n base layer 3 having high resistivity. A first source region 71, a second source region 72, and an emitter region 8 are then provided selectively on the surface layer in the p-base region 4. A first gate electrode 11 is formed in the p-base region 4 sandwiched by the n base layer 3 and the first source region 71 and a second gate electrode is formed in the p-base region 4 sandwiched by the second source region 72 and the emitter region 8. The length of polysilicon forming the gate electrode is set at 4mm or less or the sheet resistance is set at 70Ω/sequare.
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