发明名称 |
IMAGE PROCESSOR AND DATA PROCESSING SYSTEM USING THE SAME |
摘要 |
PURPOSE: To perform the working and plotting processing of image data at high speed and to enable read and display processing at low cost by directly connecting a local memory for temporarily storing a command or source image data to a graphics processor. CONSTITUTION: A CPU 101 prepares the list of instructions to a graphics processor 1 while using a main memory 102 and transfers the command and input data to be processed through a data control part 11 to a synchronous DRAM 13 while using a system controller 2. Then, a bus control part 16 is installed with a bus switch 162 for switching a data path for transferring the command or source image data from the CPU 101 to the DRAM 3 and a data path for plotting the data in a frame buffer 104 while reading them from this DRAM 3. Since such a DRAM 3 is provided, the peak throughput can be provided by pipeline processing for processing the command or source image data while reading them and for writing the plotting data. |
申请公布号 |
JPH0877366(A) |
申请公布日期 |
1996.03.22 |
申请号 |
JP19940209523 |
申请日期 |
1994.09.02 |
申请人 |
HITACHI LTD |
发明人 |
NAKAJIMA KEISUKE;SATO JUN;YAMAGISHI KAZUSHIGE;MIYAMOTO TAKASHI;OMURA KENICHIRO;KATSURA AKIHIRO;WATABE MITSURU |
分类号 |
G09G5/00;G06F12/00;G06T1/20;G06T11/00;G06T15/04;(IPC1-7):G06T11/00 |
主分类号 |
G09G5/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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