| 摘要 |
<p>An analog-digital converter comprises a DELTA SIGMA modulator (11), a digital filter (15), a high-pass filter (16) and a multiplier (17) which are connected in series. Analog input is converted into serial-bit strings by the DELTA SIGMA modulator, for which gain '1/A' is set. The digital filter extracts low-frequency components, corresponding to the analog input, from the serial-bit strings, so the low-frequency components are converted into parallel-bit digital data. The high-pass filter removes DC offset component from output of the digital filter; and then, output thereof is multiplied by scaling gain 'A' by the multiplier so that digital output is produced. The DELTA SIGMA modulator comprises at least three switched-capacitor integrators and a one-bit quantizer, which are connected in series, as well as a one-sample delay circuit. One-bit output, produced by the one-bit quantizer, is delayed by the one-sample delay circuit, whose output is delivered to each switched-capacitor integrator. Each switched-capacitor integrator is configured using a CMOS differential amplifier which is configured by a CMOS operational amplifier (120) and at least one amplitude-limiting circuit (121,122). The amplitude-limiting circuit is configured by two PMOS transistors (Qp11,Qp14,Qp29,Qp24) and two NMOS transistors (Qn12,Qn13,Qn23,Qn22) which are connected in parallel in a diode-connection manner; and this circuit is provided to limit amplitude in output of the CMOS differential amplifier by stabilizing its operating point. <IMAGE> <IMAGE></p> |
