| 摘要 |
PURPOSE: To obtain the switched capacitor filter in which a charge/discharge speed deterioration due to the effect of a parasitic capacitance between a 1st polysilicon electrode and a semiconductor layer forming a well is not caused when a 2-layer polysilicon capacitor is employed. CONSTITUTION: A caption number 3 is an operational amplifier, captions SW1-SW4 are switch means comprising MOS transistors(TRs), and caption numbers 1, 2 are 2-layer polysilicon capacitors. The conduction/nonconduction of the switches SW1-SW4 is controlled by biphase clocksΦ1,Φ2 inverted to each other and having a non-overlap period (t) at a high level. In this switched capacitor filter, the P-channel semiconductor layers of the 2-layer polysilicon capacitors 1, 2 are formed in an N-channel silicon substrate 16 as shown in figure (b) while being insulated electrically to each other through PN separation and each P-channel semiconductor layer terminal is connected to a 1st polysilicon electrode terminal.
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