发明名称 MEMORY CIRCUIT USING RESISTIVE RANDOM ACCESS MEMORY ARRAYS IN A SECURE ELEMENT
摘要 A memory circuit using resistive random access memory (ReRAM) arrays in a secure element. The ReRAM arrays can be configured as content addressable memories (CAMs) or random access memories (RAMs) on the same die, with the control circuitry for performing comparisons of reference patterns and input patterns located outside of the ReRAM arrays. By having ReRAM arrays configured as CAMs and RAMs on the same die, certain reference patterns can be stored in CAMs and others in RAMs depending on security needs. For additional security, a heater can be used to erase reference patterns in the ReRAM arrays when desired.
申请公布号 WO2016195736(A1) 申请公布日期 2016.12.08
申请号 WO2015US52913 申请日期 2015.09.29
申请人 CAMBOU, Bertrand, F. 发明人 CAMBOU, Bertrand, F.
分类号 G11C15/00 主分类号 G11C15/00
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