发明名称 |
Metallic etch stop layer in a three-dimensional memory structure |
摘要 |
A dielectric liner, a bottom conductive layer, and a stack of alternating layers including insulator layers and spacer material layers are sequentially formed over a substrate. A memory opening extending through the stack can be formed by an anisotropic etch process that employs the bottom conductive layer as an etch stop layer. The memory opening is extended downward by etching through the bottom conductive layer and the dielectric liner, while minimizing an overetch into the substrate. A memory stack structure can be formed in the memory opening. Subsequently, a backside contact trench can be formed through the stack employing the bottom conductive layer as an etch stop layer. The spacer material layers can be removed to form backside recesses, which are filled with a conductive material to form electrically conductive layers. The remaining portion of the bottom conductive layer can be employed as a source select gate electrode. |
申请公布号 |
US9530788(B2) |
申请公布日期 |
2016.12.27 |
申请号 |
US201514659963 |
申请日期 |
2015.03.17 |
申请人 |
SANDISK TECHNOLOGIES LLC |
发明人 |
Oginoe Tomohiro;Honma Ryoichi;Terahara Masanori |
分类号 |
H01L27/115;H01L29/792;H01L23/522;H01L29/51;H01L29/49;H01L29/788;H01L29/16;H01L29/423;H01L21/768;H01L21/28;H01L29/66;H01L23/528 |
主分类号 |
H01L27/115 |
代理机构 |
The Marbury Law Group PLLC |
代理人 |
The Marbury Law Group PLLC |
主权项 |
1. A monolithic three-dimensional memory device, comprising:
a dielectric liner contacting a top surface of a semiconductor substrate; a bottom conductive layer contacting a top surface of the dielectric liner; a stack of alternating layers comprising insulator layers and electrically conductive layers and located over the bottom conductive layer; a memory opening extending through the stack, the bottom conductive layer, and the dielectric liner; and a memory film located within the memory opening, wherein a bottommost surface of the memory film is coplanar with a bottom surface of the dielectric liner, wherein the bottom conductive layer comprises:
a bottom metallic liner comprising a first conductive metallic compound and contacting a top surface of the dielectric liner, anda bottom metallic material layer comprising a first metallic material selected from an elemental metal and an alloy of at least two elemental metals and contacting the bottom metallic liner; and wherein a horizontal interface between the bottom metallic liner and the bottom metallic material layer is adjoined to an outer sidewall of the memory film. |
地址 |
Plano TX US |